Innovations in semiconductor fabrication and packaging technologies have enabled development of smaller scale, higher density integrated circuit chips, as well as the development of highly integrated chip modules with wiring and area array I/O contact densities that enable dense packaging of IC chips. In certain applications, high-performance electronic modules can be constructed with one or more MCMs (multi-chip modules) mounted to a circuit board such as a system board (or node card), a PCB (printed circuit board), a PWB (printed wiring board), etc, using a suitable area array connection technique for module-to-board I/O interconnections. By way of example, high performance computer systems are typically designed with high-performance processor modules having first level packages (chip modules) constructed using MCM technology to achieve high-density packaging of large numbers of IC processor chips, as well as LGA technology to achieve high-density and high-count I/O interconnections to a second level package (e.g., node card).
Current MCM technology using glass-ceramic substrates can readily accommodate the higher I/O and power density requirements for compact, high performance package designs. In general, state of the art MCM techniques allow a plurality of IC chips to be flip-chip bonded to a ceramic module substrate using small pitch, highly dense arrays of micro-solder ball interconnects formed between bonding pads on the active surfaces of the IC chips and matching arrays of contact pads formed on a chip mounting surface on the ceramic substrate. For example, with glass-ceramic technology, high-density arrays of contact pads with on center contact pitches in the range of 0.15 to 0.25 mm, for example, can be formed on the top side substrate surface. Moreover, glass-ceramic MCM technology supports the wiring densities that are required for escape routing from the top side high-density contact arrays to, e.g., other chips on the substrate and to high density arrays of I/O contacts formed on the bottom side of the MCM substrate for module I/O.
For high-performance package designs, LGA techniques enable direct interconnection between corresponding area arrays of I/O contacts formed on mating surfaces of a chip module (e.g., MCM) and circuit board using a conductive interposer that is compressed between the module and board. Various types of LGA interposer structures have been developed which generally include, for example, rigid, semi-rigid and flexible substrate structures having arrays of electrical contacts formed by, e.g., compressible conductive spring structures, conductive metal-elastomer composites, wadded wire, etc. State of the art LGA techniques enable MCM-to-board interconnections with I/O interconnect densities/counts and electrical/mechanical properties that are desirable for high-performance CPU module designs. Moreover, LGA provides electrical and mechanical interconnect techniques that allow MCM chip modules to be readily removable from circuit boards, which is advantageous for high-end modules such as CPU packages which may require repeated rework during production or are designed to be field-upgradeable.
FIGS. 1A and 1B schematically illustrate an electronic apparatus having a conventional LGA packaging structure for module-to-board I/O interconnection. FIG. 1A is a schematic cross-sectional side-view of an electronic apparatus (10) which generally comprises a chip module assembly (100), an LGA interposer (120), an electrical circuit board (130) and insulator layer (140) and a stiffener plate (150). The chip module assembly (100) comprises an MCM (multi-chip module) (110), a metallic support frame structure (104) and a thermal hat (105). The MCM (110) includes a module substrate (102) with a plurality of IC chips (103) flip-chip mounted to an array of contacts formed on the top surface of the substrate (102) via micro-solder balls (103a). The substrate (102) includes multiple levels of wiring and interconnects that provide electrical connections between top side contacts, other top side contacts, or an area array of I/O contacts (102a) formed on the bottom side of the substrate (102).
FIG. 1B is a schematic plan view of the bottom surface of the chip module assembly (100), which illustrates the bottom surfaces of the support frame (104) and the MCM substrate (102). The support frame (104) is designed to surround the perimeter of the MCM substrate (102). The support frame (104) includes various mechanical components (107) and (108) to support LGA alignment and actuation, as explained below. FIG. 1B illustrates a layout pattern of the I/O contacts (102a) on the bottom side of the substrate (102). In the exemplary embodiment, the area array of I/O contacts (102a) are arranged in 4 rectangular arrays (A1, A2, A3, A4) of evenly spaced metallized I/O pads, where the arrays are separately located in one of 4 quadrants on the bottom surface of the MCM substrate (102).
Referring again to FIG. 1A, the circuit board (130) includes an area array of contact pads (130a) on a top surface of the board (130) having a layout pattern matched to that of the area array of I/O contacts (102a) on the bottom of the MCM substrate (102). The board (130) includes conductive through vias (130b) formed within the board (130) below the contacts (130a). The board (130) includes multiple levels of wiring with connections to the conductive vias (130b) to thereby route I/O signals and power to the contacts (130a). The insulator sheet (140) electrically isolates the board (130) from the stiffener plate (150).
The LGA interposer (120) functions as a direct electrical interface to connect the I/O contacts (102a) on the bottom of the MCM substrate (102) to matching I/O contacts (130a) on the upper surface of the circuit board (130). The LGA interposer (120) includes an insulating substrate (121) having an array of interposer connectors (122) aligned with corresponding I/O contacts (102a) on the bottom of the MCM substrate (102) and contacts (130a) on the top surface of the board (130). The interposer connectors (122) directly interface with the contacts (102a) and (130a). The LGA interposer (120) in FIG. 1A has a conventional “wadded wire contact” type LGA interposer framework, which comprises a substantially rigid plastic frame (121) having an array of wadded wire connectors (122) disposed in apertures in the plastic frame (121). The wadded wire connectors (122) are formed of a deformable, randomly configured, resilient conductor material held by friction within the plastic frame (121). The wadded wire connectors (122) provide direct connections between corresponding contacts on the MCM and board.
In general, the multichip module (110), LGA interposer (120), and circuit board (130) form a stacked structure, which is fixedly held together using a compression force applied by a hardware actuation structure to compress the LGA interposer (120) between the chip module (110) and board (130) with a force that is sufficient to ensure proper actuation of the LGA connectors (122). The support frame (104), package thermal hat (105) and stiffener plate (150) are mechanical components that serve various purposes including, e.g., mechanical support, thermal cooling, uniform loading of compression forces for LGA actuation, etc. For instance, the thermal hat (105) serves as a protective package lid as well as a heat spreader for cooling the IC chips (103). A thermal paste layer (106) is disposed between the back surface of the chips (103) and the thermal hat (105). The thermal paste (106) provides mechanical compliance and serves as a primary thermal path to transfer heat from the IC chips (103) to the thermal hat (105). An air cooled heat sink or a liquid cooled cold plate can be coupled to the thermal hat (105) to remove heat using known methods.
The metal support frame (104) serves to mechanically support the MCM (110), the thermal hat (105) and associated heat sink device mounted on top of the thermal hat (105). As shown in FIGS. 1A and 1B, the support frame (104) is designed to surround the outer perimeter of the MCM substrate (102). A silicone based adhesive is commonly used to bond a projection portion of the thermal hat (105) to the top surface of the MCM substrate (102) to form a semi-hermetic region around the ICs. Typically, the support frame (104) and the thermal hat (105) are bolted together.
The supporting frame (104) includes mechanisms to enable package assembly and LGA actuation. For instance, as shown in FIG. 1B, the support frame (104) includes alignment pins (107) which protrude from the bottom surface of the support frame (104) at two opposite corners thereof. These alignment pins (107) are aligned to, and mate with, alignment holes that are formed in the LGA interposer (120) and circuit board (130), to ensure proper alignment of I/O connections between the chip module (110) and board (130) through the LGA interposer (120). Moreover, hardware (108) is provided at the center of each side, for example, of the MCM (100) as part of the LGA actuation structure.
Typically, LGA actuation is achieved using stiff springs which act to pull the MCM assembly (100) towards the stiffener plate (150) with a force that is sufficient to compress the LGA (120) between the MCM (110) and board (130). The supporting frame (104) and thermal hat (105) essentially form a top loading plate which acts to uniformly distribute the load around the top perimeter of the MCM substrate (102) which further distributes the load and the stiffener plate (150) is a bottom loading plate which acts to uniformly distribute the load across the system board (120), to thereby ensure uniform compression force across the LGA contact area. Only a minimal, if any, load is transferred through the thermal hat to the thermal paste layer and to the ICs (103) mounted on the MCM substrate (102).
FIG. 1A illustrates a conventional package structure in which MCM and LGA technologies can be utilized to construct compact, high performance electronic modules, such as CPU modules, having highly-density chip modules with high density I/O module-to-board interconnections. For area array package structures such as depicted in FIG. 1A, the package footprint (i.e. MCM substrate (102) size) is based, primarily in part, on the number of I/O connections (I/O count) that are needed for a given design as well as the I/O contact density (I/O pitch). As chip modules are constructed with higher chip densities and functionality requiring higher I/O counts, the modules must be designed with smaller I/O pitch to either maintain or reduce the chip module footprint. In other words, smaller I/O pitch for the module-to-board interconnections allows higher-I/o-count chip modules to be formed using smaller substrate size, thus lowering package costs.
Although current MCM and LGA interposer technologies can achieve high I/O densities (I/O pitch less than 1 mm), the I/O interconnect density in conventional package structures such as depicted in FIG. 1A has currently reached a practical pitch limit of 1 mm. This limit is governed primarily by economics and manufacturing requirements of circuit board fabrication, which mandate the use of low-cost and high production/high yield board fabrication methods. However, state of the art board fabrication technologies (e.g., sequential lamination method) that meet such requirements are not able to provide the wiring densities needed to support I/O contact arrays having I/O pitch less than 1 mm. Although fine-pitch organic package technologies (e.g., “build-up” layers which are used in first level packages to which chips are directly attached) may be used in lieu of conventional PCB to construct system boards or node cards, it is too expensive to fabricate an entire system board or node card, for example, using such organic package technologies.
Consequently, in the package design of FIG. 1A, the I/O density is limited by the 1 mm contact pitch of the area array (130a) of the board (130). In this regard, the ability to use smaller scale MCM structures is effectively limited by the amount of electrical contacts needed to meet I/O and power requirements (bottom surface area) for the given application rather than the number and size of the chips (top surface area). As the number of I/O increases, if the I/O density cannot be increased, the MCM package size must be increased to accommodate more I/O contacts. Since MCM structures are very expensive to fabricate, it is desirable to increase the I/O available on the bottom surface of an MCM without increasing the MCM area and without decreasing the pitch of contacts on a PCB or node card or an LGA connector beyond practical limits.
Another challenge that is faced in the design of large and small computer systems is providing a mechanism to ensure that correctly licensed and purchased hardware is being used. For instance, vital product data (VPD), such as information on the number of processors activated in a system (which may be less than the actual number of processors present on the MCM) should be stored in a secure and tamper resistant manner. Moreover, when functions are added, or more processors are activated, the VPD information must be updated. Also, when MCMs are moved from one system board to another, new code must be loaded into the service element and the configuration files updated for the new hardware from the VPD.
Historically, to insure that the hardware was configured properly and that license agreements were being complied with, a special chip was included in an MCM containing the VPD and monitoring or verification electronics. In current computer systems, this approach is no longer being used due to the need to fit larger numbers of processors on each MCM, resulting in reduced security and control. In this regard, improved packaging methods are needed to integrate a VPD module, containing the VPD information and monitoring or verification electronics, in a tamper resistant manner into the MCM packaging without mounting the VPD module on the chip mounting (top) surface of the MCM substrate.